fpga_labs

Log | Files | Refs | README | LICENSE

commit b9eb8a130a03a3cbbd767951f9a335a7dd92351e
parent c0da0e7df3102872d5ac603b00f354320a0cacb7
Author: William Lindholm <william_lindholm@outlook.com>
Date:   Wed, 17 Sep 2025 22:08:49 +0200

Connected button 0 to led 0

Diffstat:
Mbuttons_to_leds/buttons_to_leds.srcs/constrs_1/new/button_led_constraints.xdc | 5+++--
Mbuttons_to_leds/buttons_to_leds.srcs/sources_1/new/top.vhd | 5+++--
2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/buttons_to_leds/buttons_to_leds.srcs/constrs_1/new/button_led_constraints.xdc b/buttons_to_leds/buttons_to_leds.srcs/constrs_1/new/button_led_constraints.xdc @@ -8,4 +8,5 @@ set_property -dict { PACKAGE_PIN U21 IOSTANDARD LVCMOS33 } [get_ports {led5}] set_property -dict { PACKAGE_PIN T20 IOSTANDARD LVCMOS33 } [get_ports {led6}] set_property -dict { PACKAGE_PIN W20 IOSTANDARD LVCMOS33 } [get_ports {led7}] -# BUTTON -\ No newline at end of file +# BUTTONs +set_property -dict { PACKAGE_PIN E2 IOSTANDARD LVCMOS33 } [get_ports {io_btn0}] +\ No newline at end of file diff --git a/buttons_to_leds/buttons_to_leds.srcs/sources_1/new/top.vhd b/buttons_to_leds/buttons_to_leds.srcs/sources_1/new/top.vhd @@ -31,14 +31,15 @@ entity top is led4 : out std_logic; led5 : out std_logic; led6 : out std_logic; - led7 : out std_logic + led7 : out std_logic; + io_btn0 : in std_logic ); end top; architecture Behavioral of top is begin - led0 <= '1'; + led0 <= io_btn0; led1 <= '1'; led2 <= '1'; led3 <= '1';